Mrs. Priyanka Agarwal

Assistant Professor

Her academic achievements include securing the gold medal in M.Tech and she has been the state topper in her B.Sc. course. She has carried out one year Internship at IISc Bangalore, where she was involved in the development of a SIL compliant Safety protocol for communication in railway systems. She has guided various projects in VLSI domain. Apart from teaching and administrative activities, she is currently involved in a satellite development project funded by DRDO. She has organized and hosted several activities at the department level. She is a certified NI LAbVIEW trainer. Her current research interests include FPGA based system design, VLSI design and Design and Verification of circuits and new architectures.

Electronics & Communications

Qualification
Qualification Institution Year
Mtech (ECE)
Responsibilities
  • Time Table Coordinator
  • EWD Co-ordinator
  • IQAC team Co-ordinator
  • Faculty Advisor

Expertise / list of subjects handled
  • Basic Electronics
  • Analog Electronic Circuits
  • Logic Design
  • Digital System Design using Verilog
  • Digital System Design using VHDL
  • CMOS VLSI Design
  • VLSI Design
  • Design of VLSI Systems
  • HDL(VHDL and Verilog)
Research Interest
  • Digital VLSI circuit and System design
  • FPGA based Real Time System Design
  • FPGA prototyping

Conferences
  • Priyanka Agarwal, Pallabi Baruah, M R Verma, S K Sinha, "An Independent Layer Protocol for Safety Critical Communication Systems" in Communication Systems and Centenary Conference EE (CCEE) IISc, 2011, Bangalore